IMG_conv_5x5_i8_c16s


Detailed Description


Functions

void IMG_conv_5x5_i8_c16s (const unsigned char *restrict imgin_ptr, unsigned char *restrict imgout_ptr, short width, short pitch, const short *restrict mask_ptr, short shift)


Function Documentation

void IMG_conv_5x5_i8_c16s ( const unsigned char *restrict  imgin_ptr,
unsigned char *restrict  imgout_ptr,
short  width,
short  pitch,
const short *restrict  mask_ptr,
short  shift 
)

Description:
The convolution kernel accepts five rows of 'pitch' input pixels and produces one row of 'width' output pixels using the five pixel square filter mask provided on input. The input and output image pixels are provided in 8-bit unsigned format and the mask is in 16-bit signed format.
The input mask is rotated 180 degrees prior to calculating the convolution sum. The convolution sum is calculated as a point by point multiplication of the rotated mask with the input image. The 25 resulting multiplications are summed together to produce a 32-bit intermediate sum. Overflow during accumulation is not prevented, though assumptions may be applied to filter gain to avoid overflow.
The user defined shift value is used to shift the convolution sum down to a 8-bit range prior to storing in the output array. The stored result is saturated accordingly. The mask is moved one column at a time, advancing the mask over the image until the entire 'width' is covered.
Parameters:
imgin_ptr Pointer to an input image of 8-bit pixels
imgout_ptr Pointer to an output image of 8-bit pixels
width Number of output pixels
pitch Number of columns in the image
mask_ptr Pointer to a 16-bit filter mask
shift User specified right shift on sum
Algorithm:
The natural C implementation has no restrictions. The optimized intrinsic C code has restrictions as noted in Assumptions below.
Assumptions:
  • The input and output arrays should not overlap
  • The output array must be 32-bit aligned
  • The mask array must be 16-bit aligned
  • The width parameter must be a non-zero multiple of 2
  • The image pitch must be greater than or equal to the width
Implementation Notes:
  • This code is fully interruptible
  • This code is compatible with C66x processors
Benchmarks:
See IMGLIB_Test_Report.html for cycle and memory information.


Copyright 2012, Texas Instruments Incorporated